Vol 1, No 1 (2010)

This paper presents a power loss minimization technique for a cascaded multilevel inverter using hybrid carrier based space vector modulation. The proposal in this paper combines the features of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation is the reduction of switching loss and energy efficiency improvements with better harmonic performance. In order to implement this hybrid modulation scheme and deliver the hybrid PWM pulses to the appropriate switches, a TMS320F2407 digital signal processor (DSP) and a Complex Programmable Logic Device (CPLD) are used. The inverter offers lower harmonic distortion and operates with equal thermal stress among the power devices. Using simulation and experimental results, the superior performance of a new PWM method is shown.

carrier-based space vector modulation, cascaded multilevel inverter, digital signal processor, power loss analysis, total harmonic distortion